1. Field of the Invention
The present invention relates to a communication method, a transmission apparatus, a reception apparatus, and a radio communication system, which are suitable for application to, for example, a cellular telephone system in which a mobile radio station radio-communicates with a base station that is a fixed radio station.
2. Description of the Related Art
In a conventional radio communication system, an area that is provided communication services is divided into cells of a desired size. A base station that acts as a fixed radio station is installed in the cell, and a cellular telephone that acts as a mobile radio station radio-communicates with the base station in the cell in which that cellular telephone is present. Various methods for communication between a cellular telephone and a base station have been proposed, and a representative one is a Time Division Multiple Access method referred to as TDMA method.
For example, as shown in FIG. 1A, the TDMA method temporally divides a predetermined frequency channel into frames F0, F1, . . . of a predetermined time interval while dividing each frame into time slots TS0 to TS3 of a predetermined time interval, and uses this frequency channel to transmit a transmission signal at the timing of the time slot TS0 that is assigned to the station itself. This method enables a plurality of communications to use the same frequency channel (so-called multi-communication), thereby enabling frequencies to be efficiently used. In FIG. 1B and the subsequent drawings, the time slot TS0 assigned for transmission is called a xe2x80x9ctransmission slot TXxe2x80x9d, and data blocks sent by a single transmission slot TX is called a xe2x80x9cslotxe2x80x9d.
Transmission and a reception apparatuses for a radio communication system that transmits and receives a digital signal using the TDMA method are described with reference to FIGS. 2 and 3. The transmission and reception apparatuses shown in FIGS. 2 and 3 are mounted in a cellular telephone and a base station in a cellular telephone system, for example, and are used for communications between them.
As shown in FIG. 2A, a transmission apparatus 1 is roughly composed of a convolution coding circuit 2, an interleave buffer 3, a slotting circuit 4, a Differential Quadrature Phase Shift Keying (DQPSK) modulation circuit 5, a transmission circuit 6, and an antenna 7, wherein transmission data S1 to be transmitted is first input to the convolution coding circuit 2.
The convolution coding circuit 2 consists of a predetermined number of shift registers and a predetermined number of exclusive OR circuits, and convolution-codes the input transmission data S1 to output the resulting transmission symbols S2 to the interleave buffer 3. The interleave buffer 3 sequentially stores the transmission symbols S2 in its internal storage. Once the entire storage has been filled with the transmission symbols S2 (a desired amount of transmission symbols S2 have been stored), the buffer 3 randomly changes the order of the transmission symbols S2 (hereafter such a change of order is referred to as xe2x80x9cinterleavingxe2x80x9d). The resulting transmission symbols S3 are output to the slotting circuit 4. The interleave buffer 3 has a sufficient capacity to store a plurality of slots so that transmission symbols are distributed to a large number of transmission slots TX.
To assign the transmission symbols S3 to the transmission slots TX, the slotting circuit 4 rearranges the transmission symbols S3 in slots, and sequentially outputs the slotted transmission symbols S4 to the DQPSK modulation circuit 5. The DQPSK modulation circuit 5 DQPSK-modulates the transmission symbols S4 supplied in slots to generate a transmission signal S5 representing the symbol information as phase values, and outputs them to the transmission circuit 6.
The transmission circuit 6 filters the transmission signal S5 supplied in slots, converts it into an analog signal, and converts the frequency of said analog transmission signal to generate a transmission signal S6 of a predetermined frequency channel. The transmission circuit 6 then amplifies the transmission signal S6 up to a predetermined voltage and outputs said signal to the antenna 7. Thus, the transmission apparatus 1 sends out the transmission signal S6 that has been partitioned into slots, in synchronism with the timing of the transmission slots TX. For reference, FIG. 2B schematically shows the signal processing executed in each circuit of the transmission apparatus 1 described above.
On the other hand, as shown in FIG. 3A, a reception apparatus 10 is roughly composed of an antenna 11, a reception circuit 12, a DQPSK demodulation circuit 13, a slot concatenation circuit 14, a deinterleave buffer 15, and a Viterbi decoding circuit 16. The reception apparatus 10 uses the antenna 11 to receive the transmission signal S6 sent from the transmission apparatus 1, and outputs said signal to the reception circuit 12 as a reception signal S11. The reception circuit 12 amplifies the input reception signal S11, converts the frequency of the reception signal S11 to obtain a baseband signal, and filters said baseband signal. The reception circuit 12 then converts the baseband signal into a digital one to obtain a reception signal S12 that has been DQPSK-modulated, and outputs said signal to the DQPSK demodulation circuit 13.
The DQPSK demodulation circuit 13 DQPSK-demodulates the reception signal S12 to obtain symbol information, and outputs this information to the slot concatenation circuit 14 as reception symbols S13. The reception symbols S13 are not a binary signal having a value of xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d, but a multi-value signal due to noise components added on the transmission path. The slot concatenation circuit 14 concatenates the reception symbols S13 fragmentarily obtained in each slot so that said symbols form continuous signals. Once an amount of reception symbols S13 have been accumulated up to the capacity of the subsequent deinterleave buffer 15, the circuit 14 concatenates said reception symbols S13 and outputs concatenated reception symbols S14 to the deinterleave buffer 15.
The deinterleave buffer 15 has a sufficient capacity to store a plurality of slots. Once the deinterleave buffer 15 has sequentially stored the supplied reception symbols S14, it uses the reverse procedure to that of the interleave buffer 3 on the transmission apparatus 1 in order to change the order of the reception symbols S14 to the original one, and outputs the resultant reception symbols S15 to the Viterbi decoding circuit 16 (hereafter, returning to the original order is referred to as xe2x80x9cdeinerleavingxe2x80x9d). The Viterbi decoding circuit 16 consists of a soft-decision Viterbi decoding circuit. The circuit 16 assumes trellis codes for convolution based on the input reception symbols S15 and selects from all possible data state transitions (so-called maximum likelihood sequence estimation) to recover reception data S16 indicating the transmitted data for output. FIG. 3B schematically shows the signal processing executed in each circuit of the reception apparatus 10 described above.
In the reception apparatus 10, the Viterbi decoding circuit 16 executes the maximum likelihood sequence estimation to recover the reception data S16, but this estimation must be more accurate to more accurately recover the reception data S16.
This is specifically described below. As described above, the reception symbols S13 output from the DQPSK demodulation circuit 13 constitute a multivalue signal. The value of the multi-value signal roughly indicates the reliability of the reception symbols. A Viterbi decoding circuit that decodes such a multi-value signal is called a softdecision Viterbi decoding circuit, and normally recovers data by means of the maximum likelihood sequence estimation taking the reliability of each symbol into consideration. On the contrary, a Viterbi decoding circuit that decodes a binary signal having a value of xe2x80x9cxe2x88x921xe2x80x9d or xe2x80x9c+1xe2x80x9d is generally called a harddecision Viterbi decoding circuit.
The soft-decision Viterbi decoding circuit is assumed to provide more accurate maximum likelihood sequence than the hard-decision Viterbi decoding circuit. This is because the soft-decision Viterbi decoding circuit receives a multi-value signal reflecting the reliability to provide estimation reflecting the reliability.
Thus, to increase the accuracy in the maximum likelihood sequence estimation, the reliability of symbols should be reflected in the signal input to the Viterbi decoding circuit.
In the TDMA method, the received reception symbols are rearranged so as to correspond to each slot prior to transmission, so the communication quality may vary among the slots. Thus, in this case, the reliability indicating the communication quality of each slot should be reflected in the values of the symbols sent in that slot in order to allow the Viterbi decoding circuit to provide more accurate maximum likelihood sequence estimation. In particular, if a large number of slots are interleaved, the communication quality may significantly differ among the slots, resulting in incorrect estimations unless the communication quality is reflected.
However, due to the small number of existing communication methods in which a large number of slots are interleaved, a multi-value signal output from a signal line is directly input to the Viterbi decoding circuit and the communication quality of each slot is not reflected. Thus, in a communication method in which a large number of slots are interleaved, the communication quality of each slot is desirably reflected in the value of a signal input to the Viterbi decoding circuit.
In fact, since the interleaved slots have different receive power due to phasing, if a reception signal from an interference wave source has much higher received power than a reception signal of a desired wave, then the interference wave may be mistakenly received instead of the desired wave, for example, when the timing of multicarrier modulation or demodulation is offset.
In this case, in the DQPSK modulation and demodulation, the transmitter and the receiver are not in synchronism and if the reception of a signal by the receiver is temporally offset, that effect is observed as the rotation of the phase on the frequency axis. If, for example, the reception timing is offset from the modulation timing by TA [sec], the phase of this signal constantly appears offset on the frequency axis by 2xcfx80xc3x97TA [rad]/[Hz]. When the frequency band for subcarriers is defined as fW [Hz] (that is, the minimum modulation time interval required to transmission this signal is defined as Tm=1/fW [Hz]) and if the signal received with a timing offset by TA [sec] is subjected to fast Fourier transformation to differentially demodulate the DQPSK-modulated symbols, a phase offset of 2xcfx80xc3x97TAxc3x97fW [rad] is constantly superimposed into each of the QPSK symbols after demodulation.
Thus, in radio communication in a multipath environment that is subjected to delay, even when the timings of transmission and reception are in synchronism, the rotation of the phase on the frequency axis may occur which is substantially equivalent to timing offset if a wave delayed due to the multiple paths has higher received power.
In view of the foregoing, an object of this invention is to provide a communication method, transmission and reception apparatuses, and a cellular radio communication system in which a wave that interferes with a desired wave in a reception signal can be accurately treated as noise.
The nature, principle and utility of the invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings in which like parts are designated by like reference numerals or characters.